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Software Vault: The Gold Collection
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Software Vault - The Gold Collection (American Databankers) (1993).ISO
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cdr22
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m5cache.zip
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M5.CFG
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1993-06-15
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4KB
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136 lines
***********************************************************************
M5.CFG
This file is used by the program M5.EXE to configure the M5 registers
according to the data contained in this file. M5.EXE reads each
line in this file looking for a matching token(setup string) so it
can convert the string into the value for the appropriate M5 register.
To use this file, look for the token(setup string) lines at the end
of each section below. Enter a HEX value that appropriately sets up
the cache. You can edit the value on the right side of the "=" sign,
but you cannot edit the token itself.
***********************************************************************
Cache Coniguration Register 0
M5 Register 0C0h
Bit 0 - NC0: If = 1, sets the first 64Kbytes at each 1 Mbyte
boundry as non-cacheable, when operating in real or
virtual 8086 mode.
1 - MC1: If = 1, sets t640 Kbytes to 1Mbyte region as non-
cacheable.
2 - A20M: If = 1, enables A20M# input pin.
3 - KEN: If = 1, enables KEN# input pin.
4 - FLUSH: If = 1, enables KEN# input pin.
5 - BARB: If =, enables flushing of internal cache when
hold state is entered.
6 - C0: Selects cache organization:
0 = 2-way set associative
1 = directed mapped
7 - SUSPEND: If = 1, enables SUSP# input and SUSPA# output
pins.
setup string (value in HEX)
CC_0=1
***********************************************************************
Cache Coniguration Register 1
M5 Register 0C1h
Bit 0 - RPL: If = 1, enables output pins RPLSET and RPLVAL#. If
not enabled, outputs RPLSET and RPLVAL# wil float.
7-1 - reserved
setup string (value in HEX)
CC_1=0
***********************************************************************
Non-Cacheable Region 1
M5 Register C4, C5, and C6
C4h
Bits 7-0 - Address bits A31 - A24 of Region 1 starting address
C5h
Bits 7-0 - Address bits A23 - A16 of Region 1 starting address
C6h
Bits 7-4 - Address bits A15 - A12 of Region 1 starting address
3-0 - Size of non-cacheable Region 1
setup string (values in HEX)
NCR_1_C4=00
NCR_1_C5=0a
NCR_1_C6=06
***********************************************************************
Non-Cacheable Region 2
M5 Register C7, C8 and C9h
C7h
Bits 7-0 - Address bits A31 - A24 of Region 2 starting address
C8h
Bits 7-0 - Address bits A23 - A16 of Region 2 starting address
C9h
Bits 7-4 - Address bits A15 - A12 of Region 2 starting address
3-0 - Size of non-cacheable Region 2
setup string (values in HEX)
NCR_2_C7=00
NCR_2_C8=0c
NCR_2_C9=07
***********************************************************************
Non-Cacheable Region 3
M5 Register CA, CB and CCh
CAh
Bits 7-0 - Address bits A31 - A24 of Region 3 starting address
CBh
Bits 7-0 - Address bits A23 - A16 of Region 3 starting address
CCh
Bits 7-4 - Address bits A15 - A12 of Region 3 starting address
3-0 - Size of non-cacheable Region 3
setup string (values in HEX)
NCR_3_CA=00
NCR_3_CB=00
NCR_3_CC=00
***********************************************************************
Non-Cacheable Region 4
M5 Register CD, CE and CFh
CDh
Bits 7-0 - Address bits A31 - A24 of Region 4 starting address
CEh
Bits 7-0 - Address bits A23 - A16 of Region 4 starting address
CFh
Bits 7-4 - Address bits A15 - A12 of Region 4 starting address
3-0 - Size of non-cacheable Region 4
setup string (values in HEX)
NCR_4_CD=00
NCR_4_CE=00
NCR_4_CF=00
**********************************************************************